NCSU Institutional Repository >
NC State Theses and Dissertations >
Theses >

Please use this identifier to cite or link to this item: http://www.lib.ncsu.edu/resolver/1840.16/1824

Title: Dynamically Reconfigurable Intrusion Detection System
Authors: Prasad, Praveen
Advisors: Paul D Franzon, Committee Chair
Keywords: Snort
Reconfigurable
FPGA
Intrusion Detection
Packet Filter
Issue Date: 21-May-2004
Degree: MS
Discipline: Computer Engineering
Abstract: This dissertation implements a Network Based Intrusion Detection System on a Dynamically Reconfigurable Architecture. The design is captured using synthesizable Verilog HDL. The Dynamically Reconfigurable Intrusion Detection System (DRIDS) addresses the challenges faced by typical applications that use Reconfigurable devices that do not exploit their full computational density because of the limited FPGA memory, inefficient FPGA utilization, processor to FPGA communication bottlenecks and high reconfiguration latencies. The implementation of Intrusion Detection on the DRIDS boasts of high computational density and better performance through the exploitation of parallelism inherent in this application.
URI: http://www.lib.ncsu.edu/resolver/1840.16/1824
Appears in Collections:Theses

Files in This Item:

File Description SizeFormat
etd.pdf340.74 kBAdobe PDFView/Open

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.