NCSU Institutional Repository >
NC State Theses and Dissertations >
Dissertations >

Please use this identifier to cite or link to this item: http://www.lib.ncsu.edu/resolver/1840.16/3317

Title: Linearly Tunable RF-MEMS Capacitors Implemented Using An Integrated Removable Self-Masking Technique
Authors: Wilson, John Michael
Advisors: Jacqueline Krim, Committee Member
Gianluca Lazzi, Committee Member
Thomas Conte, Committee Member
Paul D. Franzon, Committee Chair
Keywords: SANDIA
Gear
Rotate
Varactor
SUMMIT
Removable Mask
RF
Self Masking
Metallization
Tunable Capacitor
MEMS
RF MEMS
Issue Date: 8-Apr-2003
Degree: PhD
Discipline: Electrical Engineering
Abstract: MEMS tunable capacitors exhibit a non-linear capacitance verses voltage tuning characteristic. In addition, electro-statically actuated devices suffer from 'pull-in' after exceeding 33% of their total displacement. This non-linear behavior and limitation on continuous tuning that occurs from 'pull-in', limits the easy-of-use and tuning range of previously reported MEMS tunable capacitors. This dissertation presents a MEMS tunable capacitor that produces a wide tuning range with linear tuning throughout. The basic concept is similar to that of trimming/tuning capacitors used in early radios, where multiple metal plates create a capacitor that is varied by rotating a shaft which changes the overlap area. However, this device is built using modern IC processing methods that enable batch fabrication. The core of the design comes from high yield, mechanically proven gear structures defined in the SUMMiT design library, available from Sandia National Labs. Significant alterations were made to the physical gear structure to realize the final device. A novel masking technique that enables the complex patterning of metal(s), in different amounts, on any layer(s) of a released chip was also conceived. This 'integrated removable self-masking technique' enables the construction of low-loss controlled impedance structures such as coplanar waveguides in a polysilicon only MEMS process. In addition, this technique allows metal to be deposited in a regulated manner on multiple layers of a post release chip so that low-loss metal-insulator-metal capacitors can be built. Numerous device topologies are possible each with advantages and disadvantages. These various topologies and their design are discussed in detail. The metallization techniques for depositing single or dual metal layers are presented, along with a discussion on the construction of the masking layers so that they can be easily removed. Device simulation, modeling, and measurement are then presented.
URI: http://www.lib.ncsu.edu/resolver/1840.16/3317
Appears in Collections:Dissertations

Files in This Item:

File Description SizeFormat
etd.pdf32.79 MBAdobe PDFView/Open

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.