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|Title: ||Fair Queueing Algorithms for QOS support in Packet Switched Networks|
|Authors: ||Sridharan, Savitha|
|Advisors: ||Dr. Yannis Viniotis, Committee Chair|
Dr. Mike Devetsikiotis, Committee Member
Dr.Gregory T Byrd, Committee Member
|Keywords: ||WJ-EDF; Weighted-Jitter; Scheduling ; EDF; Earlies|
|Issue Date: ||11-May-2006|
|Discipline: ||Electrical Engineering|
|Abstract: ||The rapid growth of telecommunications has led to a demand for convergence of voice, video and data integration over traditional data networks. This has strained the current packet-switched networks which are not very well-suited for voice and video applications. Quality-of-service-aware, high-speed packet switches are being designed to alleviate the problems in traditional networks. The key motivation of this thesis was to analyze scheduling algorithms in order to guarantee Quality of Service for high-speed packet networks, particularly for voice applications.
A behavioral model of the Agere Network Processor's scheduler, Sched-650 was implemented in C. Using this simulator, various options to modify scheduling algorithms and understand their implementation issues were analyzed. The results were then used to modify Agere's Java-based simulator. The Active List scheduling algorithm was modified with different scheduling policies to understand its effect on bandwidth sharing and jitter of different traffic flows. The fairness of a scheduling algorithm was determined based on the bandwidth allocated to all the competing flows. Experiments were also conducted to study the impact of varying packet size and number of flows for the different scheduling algorithms.|
|Appears in Collections:||Theses|
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