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Title: Characterization and Modeling of III-N MOS-HFETs for High Frequency Applications
Authors: Dandu, Krishnanshu
Advisors: Dr. Doug Barlage, Committee Chair
Dr. Mark Johnson, Committee Member
Dr. Leda Lunardi, Committee Member
Dr. Kevin Gard, Committee Member
Keywords: Self-heating
Quantum well
Space charge
Thermal resistance
Issue Date: 20-Nov-2006
Degree: PhD
Discipline: Electrical Engineering
Abstract: This research focuses on the characterization and modeling of AlGaN⁄InGaN MOS-HFETs. DC and small signal S parameter measurements were used to characterize these FETs and the associated AlGaN⁄InGaN MOS heterojunction varactors. An equivalent circuit model was developed for the AlGaN⁄InGaN MOS varactor. The model accurately represents measured S-parameters of the device from 45 MHz to 10 GHz over the entire operating range of the device (gate bias varying from -8V to 6V). The extracted gate capacitance indicated the presence of an accumulation layer in the AlGaN barrier layer in forward bias (Vg > 3V). A physics based large signal model has been developed for the varactor. The model utilizes the triangular well approximation to describe charge control at the heterointerface and takes polarization into account. Free carrier generation and neutralization of donor atoms in the AlGaN barrier layer. The model accurately fits the extracted gate capacitance in HFET mode of operation and exhibits the real space transfer of free charge into the barrier layer. The second part of this work focused on the small signal characterization and modeling of the FETs. A direct extraction technique has been developed to extract the small signal components of a FET in presence of bias dependent series resistances. This method was applied to the extraction of small signal equivalent circuits for the AlGaN/InGaN MOS-HFET which exhibited varying source and drain resistances with bias. In the third part, a large signal model has been developed for these devices using the linear charge control equation while taking polarization effects into account. The intrinsic device model uses a quasi two dimensional solution of the Poisson equation in the channel to take velocity saturation effects into account. The capacitances are modeled by developing analytical expressions for the channel charge partitioned between the source and drain. The model has been implemented in Agilent ADS using Verilog-A and is compared to measured DC IV and small signal parameters. The limitations of this model are discussed and methods to enhance it are proposed. Finally, work done on characterization of GaN n-i-n structures utilizing re-grown source drain contacts is presented and discussed. The devices were modeled using expressions developed for devices with a uniform trap distribution in the bandgap.
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