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|Title: ||Design and Performance Characterization of a Test System for Microprocessor Hot Spot Cooling using Thin-film Superlattice Thermoelectrics|
|Authors: ||Cancheevaram, Jai Kumaran Kuppuswamy|
|Advisors: ||Dr. Winser E. Alexander, Committee Chair|
Dr. John F. Muth, Committee Member
Dr. Ronald O. Scattergood, Committee Member
|Keywords: ||microprocessor cooling hot spot thermoelectrics|
|Issue Date: ||25-Jan-2004|
|Discipline: ||Computer Engineering|
|Abstract: ||The constant need for higher performance, increased levels of functional integration, as well as die size optimization has led to preferential clustering of higher power units on microprocessors. This causes higher heat flux concentrations in certain areas of the die and lower heat fluxes in certain other regions, which manifest themselves as large temperature gradients on the die surface. These local power densities are commonly referred to as 'hot spots'. The thermal cooling solution provided must effectively ensure that junction/die temperatures on the processor does not exceed the rated 90-110 °C range, to guarantee device performance and reliability.
The focus of this work is to present Thin-film Superlattice Thermoelectrics [TFST] as an excellent solution for microprocessor die Hot spot cooling. TFSTs have measured Figure of Merit [ZT] values of ~2.4 at 300K for p-type superlattices, with potential to pump heat flux of up to 700Wcm-2. Furthermore, these devices have fast response times, which makes them achieve steady state cooling in 15μs. This is vital in preventing thermal runaway and subsequent failure of microprocessors during rapid load transients.
The primary contribution of this thesis is a test setup and experimental procedure, for characterization of an integrated TFST-processor system. First I identified and isolated potential hot spots on the processor using infrared (IR) images of the die during operation. The IR images were conclusive in determining the area of these hot spots and their magnitudes in terms of maximum temperatures reached. Next I calculated the power dissipated by the processor on the basis of the heat absorbed by the cooling system. This involved building a calorimetric system, which cools the processor by circulating water. The system was calibrated with a known load and found to measure within +3 watts of the actual power dissipated, for a processor thermal design power of 30 watts. Using this system, calculations of heat dissipated by the processor under both normal clocking and over clocking cases are presented.
The final step in integrating the TFST with the processor involved mounting the TFST module onto the processor hot spot and ensuring safe operation. The TFST module itself was powered by a custom-modified Howland Current source circuit, which regulated the amount of cooling.
Further contributions of this thesis include evaluating the efficiency of the TFST and the resulting impact on microprocessor performance and reliability. The temperature at interface of the TFST module and hot spot was monitored during several stages of CPU operation. Thermal transients at the hot spots is presented in the results show that active heat spreading using TFST significantly reduces the thermal cooling budget and alleviates constraints on the cooling solution. In future, with more efficient TFST modules with higher ZT values, these hot spots may be completely eliminated.|
|Appears in Collections:||Theses|
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