Browsing by Author "Dr. Xiaosong Ma, Committee Member"

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Building an Essential Gene Classification Framework
(2006-01-05) Saha, Soma; Dr. Dennis Bahler, Committee Member; Dr. Xiaosong Ma, Committee Member; Dr. Steffen Heber, Committee Chair
The analysis of gene deletions is a fundamental approach for investigating gene function. We applied machine learning techniques to predict phenotypic effects of gene deletions in yeast. We created a dataset containing features that potentially have predictive power and then used feature processing techniques to improve the dataset and identify features that are important for our classification problem. We evaluated four different classification algorithms, K-Nearest Neighbors, Support Vector Machine, Decision Tree, and Random Forest, with respect to this problem. We used our framework to complement the set of experimentally determined essential yeast genes produced by the Saccharomyces Genome Deletion Project and produce more than 2000 annotations for genes that might cause morphological alterations in yeast.
Data Mining Techniques to Enable Large-scale Exploratory Analysis of Heterogeneous Scientific Data
(2009-04-24) Chopra, Pankaj; Dr. Steffen Heber, Committee Co-Chair; Dr. Xiaosong Ma, Committee Member; Dr. Donald L. Bitzer, Committee Chair; Dr. Ting Yu, Committee Member; Dr. Jaewoo Kang, Committee Member
Recent advances in microarray technology have enabled scientists to simultaneously gather data on thousands of genes. However, due to the complexity of genetic interactions, the function and purpose of many genes remains unclear. The cause and progression of many diseases, like cancer and Alzheimer's, is increasingly being attributed to the deregulation of critical genetic pathways. Data mining is now being extensively used in biological datasets to infer gene function, and to identify genetic biomarkers for disease prognosis and treatment. There is a considerable need to design algorithms that explore and interpret the underlying microarray data from a biological perspective. In this thesis, three areas of data mining in heterogeneous biological datasets have been addressed. First, a new clustering algorithm has been designed that leverages information on known gene functions. Most conventional clustering algorithms generate only one set of clusters, irrespective of the biological context of the analysis. This is often inadequate to explore data from different biological perspectives and gain new insights. The new clustering model generates multiple versions of different clusters from a single dataset, each of which highlights a different aspect of the given dataset. Second, a new classification algorithm has been designed that uses gene pairings for cancer classification. This exploits the concept that due to genetic interactions, gene pairs may be a better metric for cancer classification compared to single genes. Third, a meta-analysis of human and mouse cancer datasets is conducted. The results are then integrated with gene ontology and pathway knowledge to highlight pathways that are closely implicated in the cause and progression of cancer.
An Event-Driven Approach to Agent-Based Business Process Enactment
(2007-05-29) Chakravarty, Payal; Dr. James C. Lester, Committee Member; Dr. Munindar P. Singh, Committee Chair; Dr. Xiaosong Ma, Committee Member
Agents enacting business processes in large open environments need to adaptively accommodate exceptions and opportunities. Work on multiagent approaches can flexibly model business processes. This thesis proposes an event-driven architecture that enriches such models with events to support agile enactment of processes. Specifically, we place this architecture in a business process framework based on protocols and policies, where agents' behaviors are specified via rules. The agents interact via messages, and agreements between them are modeled by commitments. These messages and commitments provide only a high-level view of the interactions and fail to capture fine-grained details of how the interactions were carried out and whether they were carried out smoothly or not. There might be hindrances due to internal and external influences during the process, resulting in anomalies in the business process enactment. Handling such exceptions or capturing opportunities will deviate the protocol from its routine path but restore the enactment process to a stable state. We attempt to achieve this by introducing fine-grained event monitoring at specific points of the process enactment that require special attention. Detected exceptions are handled by the agent's policies. Monitoring processes and thereby recovering from errors spontaneously, results in a more reliable and proactive distributed system. The contributions of this thesis include (1) an event-driven architecture, (2) a specification language that combines event logic with rules, (3) a methodology to incorporate events into a protocol for fine-grained monitoring, (4) an algorithm to help a designer derive high-level (complex) event patterns, (5) an algorithm to manage subscriptions to low-level events, and (6) policy-driven exception handling. This approach is applied on a well-known business scenario. A proof-of-concept prototype has been implemented to demonstrate the feasibility of the architecture. Some experiments have been carried out to demonstrate the different perspectives of commitments and different scenarios under which event monitoring proves to be useful.
Hybrid online/offline optimization of Application Binaries
(2004-07-08) Dhoot, Anubhav Vijay; Dr. Frank Mueller, Committee Chair; Dr. Xiaosong Ma, Committee Member; Dr. Peng Ning, Committee Member
Long-running parallel applications suffer from performance limitations particularly due to inefficiencies in accessing memory. Dynamic optimizations, i.e., optimizations performed at execution time, provide opportunities not available at compile or link time to improve performance and remove bottlenecks for the current execution. In particular, they enable one to apply transformations to tune the performance for a particular execution instance. This can potentially include effects of the environment, input values as well as be able to optimize code from other sources like pre-compiled libraries and code from mixed-language sources. This thesis presents design and implementation of components of a dynamic optimizing system for long-running parallel applications that use dynamic binary rewriting. The system uses a hybrid online/offline model to collect a memory profile that guides the choice of functions to be optimized. We describe the design and implementation of a module that enables optimization of a desired function from the executable, i.e., without relying on the source code. We also present the module that enables hot swapping of code of an executing application. Dynamic binary rewriting is used to hot-swap the bottleneck function with an optimized function while the application is still executing. Binary manipulation is used in two ways - first to collect a memory profile through instrumentation to identify bottleneck functions and then to control hot-swapping of code using program transformation. We show experiments as a proof of concept for implementations of remaining components of the framework and for validation of existing modules.
Improving Power and Performance Efficiency in Parallel and Distributed Computing Systems
(2009-11-13) Lim, Min Yeol; Dr. George N. Rouskas, Committee Member; Dr. Gregory T. Byrd, Committee Member; Dr. Xiaosong Ma, Committee Member; Dr. Robert J. Fowler, Committee Member; Dr. Vincent W. Freeh, Committee Chair
For decades, high-performance computing systems have focused on increasing maximum performance at any cost. A consequence of the devotion towards boosting performance significantly increases power consumption. The most powerful supercomputers require up to 10 megawatts of peak power Ã¢â‚¬â€œ enough to sustain a city of 40,000. However, some of that power may be wasted with little or no performance gain, because applications do not require peak performance all the time. Therefore, improving power and performance efficiency becomes one of the primary concerns in parallel and distributed computing. Our goal is to build a runtime system that can understand power-performance tradeoffs and balance power consumption and performance penalty adaptively. In this thesis, we make the following contributions. First, we develop a MPI runtime system that can dynamically balance power and performance tradeoffs in MPI applications. Our system dynamically identifies power saving opportunities without prior knowledge about system behaviors and then determines the best p-state to improve the power and performance efficiency. The system is entirely transparent to MPI applications with no user intervention. Second, we develop a method for determining minimum energy consumption in voltage and frequency scaling systems for a given time delay. Our approach helps to better analyze the performance of a specific DVFS algorithm in terms of balancing power and performance. Third, we develop a power prediction model that can correlate power and performance data on a chip multiprocessor machine. Our model shows that the power consumption can be estimated by hardware performance counters with reasonable accuracy in various execution environments. Given the prediction model, one can make a runtime decision of balancing power and performance tradeoffs on a chip-multiprocessor machine without delay for actual power measurements. Last, we develop an algorithm to save power by dynamically migrating virtual machines and placing them onto fewer physical machines depending on workloads. Our scheme uses a two-level, adaptive buffering scheme which reserves processing capacity. It is designed to adapt the buffer sizes to workloads in order to balance performance violations and energy savings by reducing the amount of energy wasted on the buffers. Our simulation framework justifies our study of the energy benefits and the performance effects of the algorithm along with studies of its sensitivity to various parameters.
Interactive Visual Summarization for Visualizing Large, Multidimensional Datasets
(2007-03-21) Kocherlakota, Sarat Mohan; Dr. Rada Y. Chirkova, Committee Member; Dr. Thomas L. Honeycutt, Committee Member; Dr. Christopher G. Healey, Committee Chair; Dr. Xiaosong Ma, Committee Member
Because of its ability to help users analyze and explore data from a diverse set of domains, visualization is becoming integral to the knowledge discovery process. However, existing visualization techniques for displaying large, multidimensional datasets often produce detailed, cluttered images that overwhelm the user's ability to effectively absorb the underlying data. To visualize such datasets effectively we have developed a visual summarization framework that intelligently summarizes datasets by extracting its important and relevant characteristics prior to visualization. The summaries are then visualized both in place of the original data, or along with the original data. Our approach performs this summarization in three broad steps. First, size and dimensionality of the data are reduced meaningfully. Next, patterns and dependencies in the form of association rules, along with outliers are extracted from the reduced data. Finally, these summary characteristics are visualized using techniques that are aimed at enhancing the comprehension of the data. Summary characteristics, as well as summarization steps are also recorded. Our framework is designed to harness the benefits of both visual and non-visual methods to intuitively guide users to produce relevant data summaries. Initial results in applying our approach to practical datasets suggest that our approach could be used to generate effective visual summaries of large, multidimensional datasets from a wide variety of domains and applications.
Performance Comparison of Software Transactional Memory Implementations
(2007-07-09) Kariath, Riya Raju; Dr. Yan Solihin, Committee Member; Dr. Edward F. Gehringer, Committee Chair; Dr. Xiaosong Ma, Committee Member
Software Transactional Memory (STM), an optimistic concurrency control mechanism for controlling accesses to shared memory, is a promising alternative to lock-based mutual exclusion strategies. A transaction in this context is each piece of code that executes indivisibly in a shared memory region. Like database transactions, STM transactions preserve linearizability and atomicity properties. This thesis project presents performance comparisons based on memory, indirection and compute overheads of different STM implementations. More precisely, it compares three STM systems — a non-blocking STM due to Fraser (FSTM), a lock-based STM due to Ennals, and a lock-based STM (TL2) with global version-clock validation due to Dice et.al. A comparison employing diverse classes of STMs helps in a deeper understanding of various design choices and potential trade-offs involved. In particular, suitability of an STM is analyzed versus another STM in a given scenario. The empirical evaluations done as part of this thesis conclude that Ennals' STM has an edge over TL2 and FSTM, as it performs consistently well on low and high contention settings. The results also suggest that lock-based STMs use less memory than lock-free STMs due to better cache locality.
Scalable Compression and Replay of Communication Traces in Massively Parallel Environments
(2006-10-02) Noeth, Michael James; Dr. Tao Xie, Committee Member; Dr. Xiaosong Ma, Committee Member; Dr. Frank Mueller, Committee Chair
Characterizing the communication behavior of large-scale applications is a difficult and costly task due to code and system complexity as well as the time to execute such codes. An alternative to running actual codes is to gather their communication traces and then replay them, which facilitates application tuning and future procurements. While past approaches lacked lossless scalable trace collection, we contribute an approach that provides near constant-size communication traces regardless of the number of nodes while preserving structural information. We introduce intra- and inter-node compression techniques of MPI events and present results of our implementation. Given this novel capability, we discuss its impact on communication tuning and beyond.
Scaling Complex Analytical Processing on Graph Structured Data Using Map Reduce
(2009-01-06) Sridhar, Radhika; Dr. Kemafor Anyanwu, Committee Chair; Dr. Xiaosong Ma, Committee Member; Dr. Tao Xie, Committee Member
Efficient analytical processing at the Web scale has become an important requirement as more decision support applications rely on the data on the Web. One approach for achieving the significant scalability is by the use of parallel processing techniques on a computational cluster of the commodity grade machines. Software platforms such as Map-Reduce, Hadoop and Pig are now available that allow the users to encode their tasks in terms of simple low-level primitives that are easily parallelizable. Further, a high-level dataflow language called Pig Latin has been proposed for specifying analytical processing tasks using a mixture of the procedural and the declarative paradigms. This approach strikes a good balance between customizability and the potential for an automatic query optimization. However, the analytical processing capability currently offered by these frameworks is fairly basic and as such has narrow applicability to many real world scenarios. Furthermore, an increasing amount of data being made available on the Web is semi-structured. For example, some search engines report that the recent W3C standard for representing the metadata on the Web called the Resource Description Framework (RDF) already accounts for about 8,502,794 Web data URLâ€™s and 2,759,040 documents. However, such data is typically organized as a set of binary relations (a graph) whereas these frameworks are primarily targeted at processing the data structured as n-ary relational tables. This thesis addresses the problem of enabling scalable analytical data processing on RDF datasets. Its approach is based on extending Yahooâ€™s Pig system (an open source parallel processing) with constructs that allow complex data processing problems on the graph structured data to be expressed in a manner that is more amenable to automatic parallelization. Specifically, it makes the following contributions: 1. Extends Pig Latin, the dataflow language for Pig, with primitives that support the expression of queries in terms of a readily parallelizable multidimensional join operator, as well as support the expression of graph navigational filter expressions. 2. Implements the introduced primitives in a Hadoop implementation running on VCL 3. Develops a cost model for estimating the cost of queries expressed in terms of the multidimensional join operator.
Stack Space Analysis for ARM Executables
(2008-05-16) Ramachandran, Shankar; Dr. Xiaosong Ma, Committee Member; Dr. Yan Solihin, Committee Member; Dr. Alexander Dean, Committee Chair
Bounding maximum stack depth for embedded system applications is essential in order to avoid conditions such as stack overflow. Stack usage information is useful for allocating the stack into a memory hierarchy. Prior work in stack space analysis addresses specific issues such as handling interrupts and target ISAs other than ARM. In this thesis, we propose a methodology for stack space analysis based on euler tour traversal of the call graph to determine the maximum stack depth of the application, good preemption points for tasks and hotspots in stack depth. Our main contribution is Astute (A STack UTilization Estimator), a tool that implements our methodology for stack space analysis of ARM executables. We also study the effects of compiler optimization on maximum stack depth of an embedded system application and benchmark programs.
Traced Based Dependence Analysis for Speculative Loop Optimizations
(2007-06-19) Ramaseshan, Ravi; Dr. Xiaosong Ma, Committee Member; Dr. Frank Mueller, Committee Chair; Dr. Thomas Conte, Committee Member
Thread level speculation (TLS) is a powerful technique that can harness, in part, the large computing potential of multi-core / chip multiprocessors. The performance of a TLS system is limited by the number of rollbacks performed, and thus the number of dependence violations detected at run-time. Hence, the decomposition of a serial program into threads that have a low probability of causing dependence violations is imperative. In this thesis, we develop a framework that calculates a dynamic dependence graph of a program originating from an execution under a training input. We are investigating our hypothesis that by generating such a dependence graph, we are able to parallelize the program beyond the capability of a static compiler while limiting the number of required rollbacks. In our approach, we evaluated two techniques for calculating dependence graphs to perform our dependence analysis: power regular segment descriptors and shadow maps. After calculating dependence graphs that aid loop nest optimizations and after determining program performance after parallelization, we assess results obtained with our framework and then discuss future directions of this research. We observed the most improvement in performance for two benchmarks, while the others showed either no improvement or degradation in performance or in one case a slow-down with our analysis.
Transparent Fault Tolerance for Job Healing in HPC Environments
(2009-07-07) Wang, Chao; Dr. Frank Mueller, Committee Chair; Dr. Xiaosong Ma, Committee Member; Dr. Yan Solihin, Committee Member; Dr. Nagiza Samatova, Committee Member
As the number of nodes in high-performance computing environments keeps increasing, faults are becoming common place causing losses in intermediate results of HPC jobs. Furthermore, storage systems providing job input data have been shown to consistently rank as the primary source of system failures leading to data unavailability and job resubmissions. This dissertation presents a combination of multiple fault tolerance techniques that realize significant advances in fault resilience of HPC jobs. The efforts encompass two broad areas. First, at the job level, novel, scalable mechanisms are built in support of proactive FT and to significantly enhance reactive FT. The contributions of this dissertation in this area are (1) a transparent job pause mechanism, which allows a job to pause when a process fails and prevents it from having to re-enter the job queue; (2) a proactive fault-tolerant approach that combines process-level live migration with health monitoring to complement reactive with proactive FT and to reduce the number of checkpoints when a majority of the faults can be handled proactively; (3) a novel back migration approach to eliminate load imbalance or bottlenecks caused by migrated tasks; and (4) an incremental checkpointing mechanism, which is combined with full checkpoints to explore the potential of reducing the overhead of checkpointing by performing fewer full checkpoints interspersed with multiple smaller incremental checkpoints. Second, for the job input data, transparent techniques are provided to improve the reliability, availability and performance of HPC I/O systems. In this area, the dissertation contributes (1) a mechanism for offline job input data reconstruction to ensure availability of job input data and to improve center-wide performance at no cost to job owners; (2) an approach to automatic recover job input data at run-time during failures by recovering staged data from an original source; and (3) Ã¢â‚¬Å“just in timeÃ¢â‚¬Â replication of job input data so as to maximize the use of supercomputer cycles. Experimental results demonstrate the value of these advanced fault tolerance techniques to increase fault resilience in HPC environments.