Browsing by Author "JON-PAUL MARIA, Committee Member"

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    AC Coupled Interconnect for Inter-chip Communications
    (2007-11-10) Xu, Jian; JON-PAUL MARIA, Committee Member; W. RHETT DAVIS, Committee Member; EDWARD GRANT, Committee Member; PAUL D. FRANZON, Committee Chair; JOHN M. WILSON, Committee Co-Chair
    The scaling of integrated circuit (IC) technology demands high-speed, high-density and low-power input/output (I⁄O) for inter-chip communications. As an alternative scheme for conductive interconnects, AC coupled interconnect (ACCI) was proposed previously to meet these increasing I⁄O requirements. ACCI includes AC coupling elements into a signal channel; it has contactless physical structure and band-pass channel characteristic. ACCI can be classified into two categories: capacitively coupled interconnect (CCI) that includes series capacitors, and inductively coupled interconnect (LCI) that includes spiral transformers. This dissertation addressed research progresses on both CCI and LCI for multi-Gb⁄s inter-chip communications. System analysis and transceiver circuit design for CCI chip-to-chip communications are presented. In a demonstration for CCI on multi-chip module (MCM), two flip chips communicated pseudo random bit sequence (PRBS) signals at 2.5Gb⁄s data rate through chip-substrate interface capacitors. In a demonstration for CCI on print circuit board (PCB), two bare chips communicated data at 2.0Gb⁄s through on-chip capacitors. Potential applications of high-permittivity materials and embedded capacitors for CCI interfaces were also investigated. This work explored LCI vertical connections in three-dimensional (3D) ICs. A novel current-mode LCI transceiver circuit is presented. In measurements, two test chips stacked and communicated data at 2.8Gb⁄s through an inter-chip transformer. Misalignment and crosstalk issues in LCI are also addressed. A unique power delivery scheme, which provides AC connections through LCI interfaces and DC connections at chip edges, is proposed. A novel 3D-ICs structure, which combines LCI vertical connections and 3D vertical vias, is also presented. In measurements, eight LCI vertical channels operated simultaneously at 1.25Gb⁄s data rate. This work also explored LCI interfaces in package-board sockets and board-board connectors. Analysis and electromagnetic (E-M) modeling for interface transformers are addressed. MCM test vehicles were designed to demonstrate chip-to-chip communications over LCI. Simulations indicated a LCI transceiver system could communicate data at 2.0Gb⁄s through a pair of coupled spiral inductors. In conclusion, ACCI can provide feasible high-density high-speed and low-power I⁄O at L1~L3 packaging levels for inter-chip communications.