Browsing by Author "Kevin Gard, Committee Chair"

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    Intracellular recording with low-power low-noise CMOS voltage and current clamp circuits
    (2007-11-18) Silva, Pradeep Charles; Kevin Gard, Committee Chair; Rhett Davis, Committee Member; Douglas Barlage, Committee Member
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    Multifunction Periodic Switching Front-End Circuits for Multi-Antenna Integrated Wireless Receivers
    (2009-12-04) Krishnamurthy, Gautham; Kevin Gard, Committee Chair; Paul Franzon, Committee Member; Antonio Montalvo, Committee Member; Harvey Charlton, Committee Member
    In the domain of integrated wireless receivers, multi-antenna techniques are gaining increasing relevance and application as a result of the many advantages they offer. Chief among these advantages are improved throughput by spatial multiplexing in MIMO systems, higher SNR by diversity gains and directional gain / interference cancellation by phased array combining. However, the current state-of-the-art in multi-antenna receivers is to resort to the duplication of front-ends for each separate antenna. This leads to the obvious drawback of higher system area, power and cost. This research addresses these drawbacks of the traditional approach with a new receiver architecture termed the Switched Front-end Multi-antenna Receiver (SFMR) architecture. The SFMR style employs fast periodic switching within the front-end in order to permit the sharing of as much of the downstream circuitry following the antenna as possible. Two types of periodic switching are primarily investigated: Time-Division Multiplexing (TDM) to exploit spatial multiplexing gains and Coherent Combining (CC) for SNR improvement like in beamforming and diversity systems. A solution is proposed to address the cross-interference between multiplex channels that affected previous attempts at TDM for multiple receive antennas. The theoretical framework from first principles for the analysis and design of these periodic switching systems from a radio hardware viewpoint is developed. Closed form relations for noise figure are developed that are useful for quick figure of merit evaluations of the SFMR architecture. Four front-ends based on the SFMR architecture are implemented as CMOS designs in 0.18 μm technology for 2.4 GHz RF signals to validate the theory. Two designs are single-ended versions of a quad-amplifier array, while one is a differential version of the same. The final design is a dual-antenna differential direct-conversion receiver including all circuit blocks down to the baseband demultiplexing. The differential front-ends are multifunctional in the sense that the circuits may be reconfigured digitally and, with the help of a programmable high-speed digital controller, put in either TDM or CC modes of operation. All these designs are characterized fully to determine their gain, matching, noise and linearity performance, as also their time-domain operation. Thus, an understanding of the challenges and rewards posed by the SFMR architecture is obtained.