Browsing by Author "Michael B. Steer, Committee Member"

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Coupled Chip-to-Chip Interconnect Design
(2006-12-13) Luo, Lei; Paul D. Franzon, Committee Chair; John M. Wilson, Committee Co-Chair; Michael B. Steer, Committee Member; W. Rhett Davis, Committee Member; Jon-Paul Maria, Committee Member
In modern high performance VLSI chips high bandwidth and high throughput are becoming increasingly important. Multi-Tb⁄s throughput is the current trend of high performance VLSI chips. This trend demands high speed, high density and low power I⁄Os. AC coupled interconnect (ACCI) has been demonstrated as a systematic approach to provide higher pin density, smaller transceiver design and lower power dissipation for high speed chip-to-chip communications. ACCI utilizes non-contact capacitor plates as signal pins which yields a much higher pin density than traditional solder bump pins. The coupling capacitors provide passive equalization, thus eliminating the need for costly traditional active equalization. This saves both power and area associated with the equalization circuitry used in a traditional transceiver. ACCI also saves significant power on the transmitter by using pulse signaling instead of traditional non-return-to-zero (NRZ) signaling The pulse receiver is one of the most important designs in ACCI. The pulse receiver is used at receiver front end to recover the NRZ signal from the small pulse signal. A complementary low swing pulse receiver was designed to allow greater attenuation and to accommodate smaller coupling capacitors and longer transmission lines (T-Lines). A test chip with a complete capacitively coupled serial link was designed; including random data generator, multi-phase DLL, serializer, transmitter, pulse receiver, clock and data recovery (CDR), deserializer and bit error rate (BER) tester. ACCI chip-to-chip communication was demonstrated through two 150fF coupling capacitors and a single end terminated 15 cm microstrip line on a FR4 board at 3Gb⁄s. A differential pulse receiver is proposed for ACCI bus. The design and measurements of the proposed 36Gb⁄s receiver which operated over the 6-bit wide ACCI bus were reported. Signal integrity issues associated with the ACCI bus, such as crosstalk and switching noise, are discussed. Simulation results demonstrated that a higher data rate over ACCI channel can be achieved with more advanced CMOS technologies.
Improved Behavioral Modeling Based on the Input Output Buffer Information Specification.
(2007-04-10) Varma, Ambrish Kant; Paul D. Franzon, Committee Chair; Michael B. Steer, Committee Member; Doug Barlage, Committee Member; Angus Kingon, Committee Member
High level behavioral modeling is widely used in lieu of low level transistor models to ascertain the behavior of I⁄O drivers and receivers. IBIS (Input Output Buffer Information Specification) is one of the most widely used methodology to model digital drivers as it satisfies the basic requirements of a behavioral model such as intellectual property protection, simple structure, fast simulation time and good accuracy. As driver technology gets increasingly complicated and rise time of input signal gets increasingly smaller, important phenomenae such as simultaneous switching noise (SSN) becomes a major consideration when simulating multiple I⁄O drivers in the integrated circuit. Misrepresentation of noise might result in overestimation of signal strength and quality resulting in a high bit error rate and poor signal to noise ratio at the receiver end. This might lead to total failure of the system. With the size of the transistor shrinking, more and more I⁄Os can be accommodated on the chip, resulting in a greater probability of more drivers switching simultaneously, hence increasing the problems of SSN furthermore. Experiments show that IBIS models over-represents noise in the quiet line when placed in an environment where multiple drivers were present and switching simultaneously. A thorough analysis is performed to determine the inadequacies in IBIS with regards to SSN. A method is presented for compensating for the missing information by complimenting the IBIS model with a black box that is simulator independent, without compromising with the speed that IBIS enjoys over the transistor models. Model validation and system level tests are done with the IBIS model in conjunction with the black-box by passing a pseudo random bit sequence (PRBS) at the input. Eye diagrams are used to determine the quality of the received signal at the input for the behavior models as well as transistor models. These tests demonstrated a better response of the behavior model than the plain IBIS model when compared to the circuits with the transistor model. The enhancement of the IBIS models resulted in at least a 20% improvement in the simulation accuracy with behavioral models.
Nonlinear Behavioral Modeling of Quadrature Modulators and Analysis of Impacts on Wireless Communication Systems
(2008-08-29) Li, Minsheng; Kevin G. Gard, Committee Chair; Mark Johnson, Committee Member; Michael B. Steer, Committee Member; Huaiyu Dai, Committee Member
Sputtered (Bax, Sr1-x)TiO3, BST, Thin Films on Flexible Copper Foils for Use as a Non-Linear Dielectric
(2006-11-03) Laughlin, Brian James; Jon-Paul Maria, Committee Chair; Angus I. Kingon, Committee Member; Michael B. Steer, Committee Member; Raoul Schlesser, Committee Member; Alexei Gruverman, Committee Member
Ferroelectric thin film dielectrics have a non-linear DC bias dependent permittivity. Ferroelectric thin film can be used as the dielectric between metal electrodes to make tunable Metal-Insulator-Metal (MIM) capacitors. Varactors can be used to change the resonance frequency of a circuit allowing high speed frequency switching intra- and inter-band. 2-D geometric arrays of circuitry, where resonant frequency is independently controlled by tunable elements in each section of the array, allow electromagnet radiation to be focused and the wave front spatial trajectory controlled. BST thin films varactor allow large DC bias fields to be applied with modest voltages allowing a large tunability to be realized. If ferroelectric thin film based devices are to supplant semiconductor varactors as tunable elements then devices must be synthesized using a low cost processing methodology. The Film on Foil process methodology for depositing BST thin films on copper foil substrates was used to create BST/Cu specimens. Sputtering conditions were determined via BST deposition on platinized silicon. Sputtered BST thin films were synthesized on Cu foil substrates and densified using high T, controlled pO2 anneals. XRD showed the absence of Cu2O in as-deposited, post crystallization annealing, and post "re-ox" annealing. Data showed a polycrystalline BST microstructure with a 55 - 80 nm grain size and no copper oxidation. HRTEM imaging qualitatively showed evidence of an abrupt BST⁄Cu interface free from oxide formation. Dielectric properties of Cu/BST⁄Pt MIM devices were measured as a function of DC bias, frequency, and temperature. A permittivity of 725 was observed with tunability >3:1 was observed with zero bias tan δ of 0.02 saturating to tan δ < 0.003 at high DC bias fields. No significant frequency dispersion was observed over five decades of frequency. Temperature dependent measurements revealed a broad ferroelectric transition with a maximum at -32°C which sustains a large tenability over -150°C to 150°C. Sputtered BST thin films on copper foils show comparable dielectric properties to CVD deposited films on platinized silicon substrates proving sputtered BST⁄Cu specimens can reproduce excellent properties using a more cost-effective processing approach. A concept for reducing the temperature dependence was explored. Stack of multiple compositions of BST thin films were considered as extension of core-shell structures to a thin film format. Temperature profiles of BST°Cu films were modeled and mathematically combined in simulations of multi-composition film stacks. Simulations showed singular composition BST thin films could meet X7R specifications if film has a 292 K < TC < 330 K. Simulations of series connected film stacks show only modest temperature profile broadening. Parallel connected dual composition film stack showed a 75°C temperature range with essentially flat capacitance if a ΔTC = 283°C between the compositions were simulated. Assumptions of the simulations were maximum permittivity and temperature profile shape independent of film thickness or composition. BST⁄Cu thickness and compositions series were fabricated and dielectric properties characterized. These studies showed films could be grown from 300 nm and approaching 1 μm without changing the dielectric temperature response. In studying BST composition, a increasing TC shift was observed when increasing Ba mole fraction in BST thin films yet tunability was maintained > 3:1. These results provide a route to creating temperature stable capacitors using a BST⁄Cu embodiment. In an effort to reduce surface roughness of copper foil substrates adversely impacted BST film integrity by impairing adhesion. XPS analysis of high surface roughness commercially obtained Cu foils revealed a surface treatment of Zn-Cu-O that was not present on smooth Cu, thus an investigation of surface chemistry was conducted. Sessile drop experiments were performed to characterize Cu-BST adhesion and the affects of metallic Zn and ZnO in this system. The study revealed the work of adhesion of Cu-BST, WaCu-BST ≈ 0.60 J⁄m2, is intermediary to noble metals commonly used as electrodes and substrates for electroceramic materials. Examination of metallic Zn-BST adhesion revealed a dramatic decrease of WaZn-BST ≈ 0.13 J⁄m2, while increasing the content of Zn in metallic (Cux, Zn1-x) alloys monotonically reduced Wa(Cux, Zn1-x). Conversely, the Cu-ZnO interface showed a large work of adhesion, WaCu-ZnO = 2.0 J⁄m2. These results indicate that a ZnO interlayer between the substrate Cu and the BST thin film provides adequate adhesion for robust films on flexible copper foil substrates. Additionally, this study provided characterization of adhesion for Zn-Al2O3 and Zn-BST; data that does not exist in the open literature. A process has been developed for preparing ultra-smooth copper foils by evaporation and subsequent peel-off of copper metal layers on glass slides. These 15 ⁄m thick substrates exhibited roughness values between 1 and 2 nm RMS and 9 nm RMS over 25 μm2 and 100 μm2 analysis areas respectively. The deposition and crystallization of barium strontium titanate layers on these ultra-smooth foils is demonstrated. The fully processed dielectric layers exhibited field tunability greater than 5:1, and could withstand fields in excess of 750 kV⁄cm. High field loss tangents below 0.007 were observed, making these materials excellent candidates for microwave devices. Finally, a process of lamination and contact lithography was used to demonstrate patterning of micron-scale features suitable for microwave circuit element designs.