Browsing by Author "Purushotaman Iyer, Member"

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    A New Approach to Checking Sequence Generation for Finite State Machines
    (2001-05-21) Serdar, Burak; Kuo-Chung Tai, Chair; Mladen A. Vouk, Member; Purushotaman Iyer, Member
    This thesis presents a formal model of checking sequencegeneration for finite state specifications, based on the machine identificationproblem. The machine identification problem is concerned with drawingconclusions about the internals of an unknown machine by performing experimentson it. Using this approach, the properties of checking sequences are describedin the context of abstract experiments. This formal model is used toprove fault coverage properties of some of the existing checking sequence generation methods. The same model is alsoused to develop two new checking sequence generation methods, one usingUIO sequences and the other using a distinguishing sequence together withUIO sequences. These two new methods do not use the reset feature.Empirical results indicate that these new methods have advantages overexisting methods for checking sequence generation.