Performance Comparison of Software Transactional Memory Implementations

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Title: Performance Comparison of Software Transactional Memory Implementations
Author: Kariath, Riya Raju
Advisors: Dr. Yan Solihin, Committee Member
Dr. Edward F. Gehringer, Committee Chair
Dr. Xiaosong Ma, Committee Member
Abstract: Software Transactional Memory (STM), an optimistic concurrency control mechanism for controlling accesses to shared memory, is a promising alternative to lock-based mutual exclusion strategies. A transaction in this context is each piece of code that executes indivisibly in a shared memory region. Like database transactions, STM transactions preserve linearizability and atomicity properties. This thesis project presents performance comparisons based on memory, indirection and compute overheads of different STM implementations. More precisely, it compares three STM systems — a non-blocking STM due to Fraser (FSTM), a lock-based STM due to Ennals, and a lock-based STM (TL2) with global version-clock validation due to Dice A comparison employing diverse classes of STMs helps in a deeper understanding of various design choices and potential trade-offs involved. In particular, suitability of an STM is analyzed versus another STM in a given scenario. The empirical evaluations done as part of this thesis conclude that Ennals' STM has an edge over TL2 and FSTM, as it performs consistently well on low and high contention settings. The results also suggest that lock-based STMs use less memory than lock-free STMs due to better cache locality.
Date: 2007-07-09
Degree: MS
Discipline: Computer Science

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