Phase II Implementation and Verification of the H3 Processor.

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dc.contributor.advisor Eric Rotenberg, Chair en_US
dc.contributor.advisor James Tuck, Member en_US
dc.contributor.advisor William Davis, Member en_US
dc.contributor.author Srinivasan, Vinesh en_US
dc.date.accessioned 2015-12-05T10:03:00Z
dc.date.available 2015-12-05T10:03:00Z
dc.date.issued 2015-08-07 en_US
dc.date.submitted 2015-08-08 en_US
dc.identifier.other deg4589 en_US
dc.identifier.uri http://www.lib.ncsu.edu/resolver/1840.16/10828
dc.rights en_US
dc.title Phase II Implementation and Verification of the H3 Processor. en_US
dc.degree.name Master of Science en_US
dc.degree.level thesis en_US
dc.degree.discipline Computer Engineering en_US
dc.date.accepted 2015-12-04 en_US
dc.date.defense 2015-08-07 en_US
dc.date.released 2015-12-05 en_US
dc.date.reviewed 2015-08-18 en_US


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