Traced Based Dependence Analysis for Speculative Loop Optimizations

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Title: Traced Based Dependence Analysis for Speculative Loop Optimizations
Author: Ramaseshan, Ravi
Advisors: Dr. Xiaosong Ma, Committee Member
Dr. Frank Mueller, Committee Chair
Dr. Thomas Conte, Committee Member
Abstract: Thread level speculation (TLS) is a powerful technique that can harness, in part, the large computing potential of multi-core / chip multiprocessors. The performance of a TLS system is limited by the number of rollbacks performed, and thus the number of dependence violations detected at run-time. Hence, the decomposition of a serial program into threads that have a low probability of causing dependence violations is imperative. In this thesis, we develop a framework that calculates a dynamic dependence graph of a program originating from an execution under a training input. We are investigating our hypothesis that by generating such a dependence graph, we are able to parallelize the program beyond the capability of a static compiler while limiting the number of required rollbacks. In our approach, we evaluated two techniques for calculating dependence graphs to perform our dependence analysis: power regular segment descriptors and shadow maps. After calculating dependence graphs that aid loop nest optimizations and after determining program performance after parallelization, we assess results obtained with our framework and then discuss future directions of this research. We observed the most improvement in performance for two benchmarks, while the others showed either no improvement or degradation in performance or in one case a slow-down with our analysis.
Date: 2007-06-19
Degree: MS
Discipline: Computer Science

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