Electronica Devices and Interface Strategies for Nanotechnology

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Title: Electronica Devices and Interface Strategies for Nanotechnology
Author: Di Spigna, Neil Halen
Advisors: Dr. Veena Misra, Committee Member
Dr. Paul Franzon, Committee Chair
Dr. John Muth, Committee Member
Dr. Gregory Parsons, Committee Member
Abstract: Evaporation of ultra-thin layers of refractory metals onto glass substrates represents a relatively simple method of fabricating discontinuous metal films. The utility of these films in nanotechnology is based on the ability to control their morphology. In this thesis, control of discontinuous palladium films is demonstrated as the morphology is tailored for various applications. First, the films are successfully engineered to provide molecular scaffolding in the NanoCell. A dependency of the film morphology on the pattern density is observed which potentially could be exploited to provide wafer-scale morphology tuning with only a single evaporation. Next, electrical characterization of gold nanocrystal capacitors showed significant increases in the flat band voltage shift as the gold particle density increased. The density scaling of gold and palladium films was investigated revealing a linear dependence of gold on decreasing evaporation thickness and an exponential dependence for palladium. A palladium particle density of 1.03 x 10¹² particles cm⁻² was achieved, exceeding the theoretical target density for non-volatile memory applications. A novel technique to further increase this particle density is demonstrated. Another application for discontinuous metal films is for stochastic interface strategies. Interfacing the nanoworld with the microworld represents a critical challenge to fully integrated nanosystems. Unfortunately, not all applications can tolerate random or incomplete connectivity that can result from stochastic solutions. Therefore, a novel structure is presented that permits complete and deterministic cross-connect of orthogonal wiring arrays without the need for any critical translational alignment. Deterministically connecting 10nm wires directly to 3 µ wires would require a translational alignment to within only about 6 µ. It is shown that there is no restriction placed on the minimum nanowire pitch and that the design is independent of the technology used to fabricate the nanowires. The process is relatively simple and is presented from a fabrication perspective, critically evaluating the effect of potential processing errors on the design. A proof-of-concept structure is fabricated and analyzed, demonstrating the feasibility of this design.
Date: 2007-04-12
Degree: PhD
Discipline: Electrical Engineering
URI: http://www.lib.ncsu.edu/resolver/1840.16/4085

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