Algorithms for the multi-stage parallel machine problem with buffer constraints.

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Title: Algorithms for the multi-stage parallel machine problem with buffer constraints.
Author: Wardono, Bagas
Advisors: Dr. Yahya Fathi, Chair
Dr. Salah E. Elmaghraby, Member
Dr. Henry L. Nuttle, Member
Dr. Russell E. King, Member
Abstract: We study two problems in the context of scheduling N jobs on parallel machines in L successive stages with the primary objective of minimizing the makespan. In the first problem we assume that there are unlimited buffer capacities between successive stages. We refer to this problem as the FSPM problem. In the second problem, we assume that the buffer capacities are finite and given, and we refer to it as FSPM/b problem. Both problems are shown to be NP-hard.We focus our attention in developing heuristic search procedures for solving both problems. These procedures include the local improvement, the genetic algorithm, and the tabu search. In this context, we use two different solution representations, namely the matrix representation and the vector representation. To evaluate these procedures on an empirical basis, we carry out an extensive computational experiment consisting of two different types of data sets. The problem instances in one data set are constructed in such a manner that the corresponding optimal makespan can be easily determined. The optimal makespan of the instances in the second data set are not known. We also develop a set of lower bounds for the optimal makespan of the problem. The experimental results with the procedures that we propose show that the search procedures which are based on vector representation perform reasonably well. Among the various procedures based on this representation, our tabu search implementation was the most effective.In the context of FSPM/b problem, we also conduct an experiment with a third set of data which is available in the open literature. From the experimental results, we demonstrate the characteristic of the proposed algorithms with various buffer configurations.
Date: 2001-05-07
Degree: PhD
Discipline: Industrial Engineering

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