FabFetch: A Synthesizable RTL Model of a Pipelined Instruction Fetch Unit for Superscalar Processors.

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Title: FabFetch: A Synthesizable RTL Model of a Pipelined Instruction Fetch Unit for Superscalar Processors.
Author: Gandhi, Jayneel
Advisors: Eric Rotenberg, Committee Chair
Gregory Byrd, Committee Member
William Davis, Committee Member
Date: 2010-06-18
Degree: Master of Science
Discipline: Computer Engineering
URI: http://www.lib.ncsu.edu/resolver/1840.16/6114


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