Design of a 50 GHz Bandwidth DPSK Compatible Monolithically Integrated Optical Receiver

Show full item record

Title: Design of a 50 GHz Bandwidth DPSK Compatible Monolithically Integrated Optical Receiver
Author: Bogacki, Kevin Joseph
Advisors: Dr. Kevin Gard, Committee Member
Dr. Doug Barlage, Committee Member
Dr. Leda Lunardi, Committee Chair
Abstract: The goal of this work is the design, analysis, and simulation of a monolithic optical receiver consisting of two balanced waveguide photodiodes integrated with a differential transimpedance amplifier, based on InP double heterojunction bipolar technology for 50 Gb⁄s differential phase shift keying (DPSK) applications. For the InP ⁄ InGaAs double-heterojunction bipolar transistor (DHBT), a small signal equivalent model based upon the Gummel-Poon bipolar junction transistor model was used. This model was determined by fitting measured S-parameters from a published 180 nm collector base-metal-overlaid structure (BMOSA) with a 20 μmˆ2 hexagonal emitter area. In addition, a thermal model was incorporated to estimate the device operating temperatures. The maximum cut off frequency and maximum frequency of oscillation of the model were 289 and 210 GHz, respectively. For the InGaAs PIN waveguide photodiode (PIN-WGPD), a small signal equivalent model was also developed based upon published data. The model parameters were found by fitting the photodiode gain profile to measured results for a 300 nm thick evanescently waveguide coupled PIN-PD with a 5x20 μmˆ2 total area. The bandwidth of the photodiode was 70 GHz with a corresponding responsivity value of 0.37 A⁄W. With the transistor model, a fully differential 3-stage transimpedance amplifier was designed. The optimized amplifier yielded a gain of 18.8 dB, bandwidth of 50.3 GHz, transimpedance of 50.9 dB-Ω, and input and output reflection of better than -10 dB. Large signal simulations exhibited open eye diagrams at 50 Gb⁄s with a wide optical dynamic range of 28.8 dB. DC simulations indicated that all devices operated at a temperature of less than 144 degrees C, while total power dissipation was less than 305 mW. Finally, the optimization of the fully integrated optical receiver was evaluated. Two integration schemes were investigated — hybrid and monolithically integrated — with the monolithic optical receiver outperforming the hybrid architecture in terms of wider bandwidth and faster performance. The monolithic receiver showed a gain of 14.3 dB and a bandwidth of 50.0 GHz with input and output reflections better than -10 dB, and exhibited open eye diagrams at 50 Gb⁄s in DPSK format with an optical dynamic range of 29.0 dB. Noise analysis on the monolithic optical receiver yielded an input referred current noise of less than 65 pA / (Hzˆ(½)) at the 50 GHz bandwidth.
Date: 2007-02-26
Degree: MS
Discipline: Electrical Engineering

Files in this item

Files Size Format View
etd.pdf 2.439Mb PDF View/Open

This item appears in the following Collection(s)

Show full item record