Versatile system for triple-gated transistors with engineered corners
Title: | Versatile system for triple-gated transistors with engineered corners |
Date: | 2005 |
Citation: | Visokay, M. R., & Chambers, J. J. (2005). Versatile system for triple-gated transistors with engineered corners. U.S. Patent No. 6,969,644. Washington, DC: U.S. Patent and Trademark Office. |
URI: | http://www.lib.ncsu.edu/resolver/1840.2/1326 |
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