Structure and method to fabricate self-aligned transistors with dual work function metal gate electrodes

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Title: Structure and method to fabricate self-aligned transistors with dual work function metal gate electrodes
Date: 2006
Citation: Chambers, J. J. (2006). Structure and method to fabricate self-aligned transistors with dual work function metal gate electrodes. U.S. Patent No. 7,005,365. Washington, DC: U.S. Patent and Trademark Office.
URI: http://www.lib.ncsu.edu/resolver/1840.2/1328


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