Methods for forming and integrated circuit structures containing enhanced-surface-area conductive layers
| dc.date.accessioned | 2008-10-17T20:31:21Z | |
| dc.date.available | 2008-10-17T20:31:21Z | |
| dc.date.issued | 2007 | |
| dc.identifier.citation | Basceri, C., Visokay, M., Graettinger, T. M., & Cummings, S. D. (2007). Methods for forming and integrated circuit structures containing enhanced-surface-area conductive layers. U.S. Patent No. 7,253,102. Washington, DC: U.S. Patent and Trademark Office. | |
| dc.identifier.uri | http://www.lib.ncsu.edu/resolver/1840.2/1811 | |
| dc.format.extent | 127382 bytes | |
| dc.format.mimetype | application/pdf | |
| dc.language.iso | en | |
| dc.title | Methods for forming and integrated circuit structures containing enhanced-surface-area conductive layers | |
| dc.type | Patent |
Files in this item
| Files | Size | Format | View |
|---|---|---|---|
| US_7253102_B2_I.pdf | 124.3Kb |
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