Method of manufacturing a vertical junction field effect transistor having an epitaxial gate
| dc.date.accessioned | 2008-10-17T20:34:25Z | |
| dc.date.available | 2008-10-17T20:34:25Z | |
| dc.date.issued | 2007 | |
| dc.identifier.citation | Harris, C., Konstantinov, A., & Basceri, C. (2007). Method of manufacturing a vertical junction field effect transistor having an epitaxial gate. U.S. Patent No. 7,279,368. Washington, DC: U.S. Patent and Trademark Office. | |
| dc.identifier.uri | http://www.lib.ncsu.edu/resolver/1840.2/1814 | |
| dc.format.extent | 114057 bytes | |
| dc.format.mimetype | application/pdf | |
| dc.language.iso | en | |
| dc.title | Method of manufacturing a vertical junction field effect transistor having an epitaxial gate | |
| dc.type | Patent |
Files in this item
| Files | Size | Format | View |
|---|---|---|---|
| US_7279368_B2_I.pdf | 111.3Kb |
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