Simulation of Memory Chip Line Using an Electronics Manufacturing Simulator

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Title: Simulation of Memory Chip Line Using an Electronics Manufacturing Simulator
Author: Estremadoyro, Douglas N.; Farrington, Phillip A.; Schroer, Bernard J.; Swain, James J.
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 1997
Series/Report No.: Winter Simulation Conference Proceedings
URI: http://www.lib.ncsu.edu/resolver/1840.4/6803


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