Microarchitectural Implementation of the MIPS Floating-point ISA in FabScalar-generated Superscalar Cores.

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dc.contributor.advisorEric Rotenberg, Chairen_US
dc.contributor.advisorWilliam Davis, Memberen_US
dc.contributor.advisorHuiyang Zhou, Memberen_US
dc.contributor.authorShastri, Ashlesha Vijayen_US
dc.date.accepted2012-11-28en_US
dc.date.accessioned2012-11-30T06:31:44Z
dc.date.available2012-11-30T06:31:44Z
dc.date.defense2012-08-10en_US
dc.date.issued2012-08-10en_US
dc.date.released2012-11-30en_US
dc.date.reviewed2012-08-13en_US
dc.date.submitted2012-08-11en_US
dc.degree.disciplineComputer Engineeringen_US
dc.degree.levelthesisen_US
dc.degree.nameMaster of Scienceen_US
dc.identifier.otherdeg1992en_US
dc.identifier.urihttp://www.lib.ncsu.edu/resolver/1840.16/8214
dc.rightsen_US
dc.titleMicroarchitectural Implementation of the MIPS Floating-point ISA in FabScalar-generated Superscalar Cores.en_US

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