Peripheral Circuits Design of a Double Floating Gate Memory

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dc.contributor.advisorPaul Franzon, Chairen_US
dc.contributor.advisorNeil DiSpigna, Memberen_US
dc.contributor.advisorVeena Misra, Memberen_US
dc.contributor.authorJiang, Junningen_US
dc.date.accepted2015-07-20en_US
dc.date.accessioned2015-07-29T09:30:21Z
dc.date.available2015-07-29T09:30:21Z
dc.date.defense2015-05-11en_US
dc.date.issued2015-05-11en_US
dc.date.released2015-07-29en_US
dc.date.reviewed2015-05-26en_US
dc.date.submitted2015-05-15en_US
dc.degree.disciplineElectrical Engineeringen_US
dc.degree.levelthesisen_US
dc.degree.nameMaster of Scienceen_US
dc.identifier.otherdeg4420en_US
dc.identifier.urihttp://www.lib.ncsu.edu/resolver/1840.16/10511
dc.rightsen_US
dc.titlePeripheral Circuits Design of a Double Floating Gate Memoryen_US

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