SEISMIC RE-EVALUATION OF FAST REACTOR LOGIC CIRCUIT PANELS BY ANALYSIS AND TESTING

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dc.contributor.authorS.D. Sajish
dc.contributor.authorS.Jalaldeen
dc.contributor.authorP.Selvaraj
dc.contributor.authorP.Chellapandi
dc.date.accessioned2024-08-01T16:12:26Z
dc.date.available2024-08-01T16:12:26Z
dc.date.issued2011-11-06
dc.identifier.urihttps://www.lib.ncsu.edu/resolver/1840.20/44012
dc.publisherIASMiRT
dc.relation.ispartofseriesV - Modeling, Testing and Response Analysis of Structures, Systems and Components
dc.relation.ispartofseriesV-00 -
dc.relation.ispartofseries00 - SMiRT 21 - New Dehli, India. November 6-11, 2011
dc.titleSEISMIC RE-EVALUATION OF FAST REACTOR LOGIC CIRCUIT PANELS BY ANALYSIS AND TESTING
dc.typeConference Proceeding

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2011 - SMiRT 21 - New Delhi, India