Low voltage CMOS analog multiplier with extended input dynamic range
| dc.date.accessioned | 2008-10-16T15:58:12Z | |
| dc.date.available | 2008-10-16T15:58:12Z | |
| dc.date.issued | 1999 | |
| dc.format.extent | 99340 bytes | |
| dc.format.mimetype | application/pdf | |
| dc.identifier.citation | Cranford, H. C., Gyurcsik, R. S., & McElwee, J. F. (1999). Low voltage CMOS analog multiplier with extended input dynamic range. U.S. Patent No. 5,872,446. Washington, DC: U.S. Patent and Trademark Office. | |
| dc.identifier.uri | http://www.lib.ncsu.edu/resolver/1840.2/1636 | |
| dc.language.iso | en | |
| dc.title | Low voltage CMOS analog multiplier with extended input dynamic range | |
| dc.type | Patent |
