Fabrication and Evaluation of Devices Containing High K Gate Dielectrics and Metal Gate Electrodes for the 70 and 50NM Technology Nodes of ITRS

Abstract

This dissertation has focused on fabrication and characterization of alternative gate stacks consisting of high-K dielectrics and metal gates. This work has presented the evaluation of Ta based metals including Ta, TaNx, and TaSixNy as gate electrodes for their potential use in NMOS devices.

For bulk CMOS devices, gate metals must have work functions that are near the conduction and valence band edges of Si. Although several metal gate electrodes have been identified for SiO2 dielectrics based on their work function, thermal stability and carrier concentration, their compatibility with high-K dielectrics is not fully understood. The questions that need to be addressed include thermal stability of metals on high-K, work function values, Fermi level pinning and performance. In this work, we report on the characteristics of metal gate electrodes on SiO2 and HfO2-based dielectrics with respect to equivalent oxide thickness (EOT), flatband voltage (VFB), leakage, work function and thermal stability.

The research indicated that the workfunction of TaSixNy is compatible with NMOS devices, provided the right composition is achieved. The improved stability of TaSixNy gates is attributed to the presence of Si and N in the gate electrode, which can improve the film microstructure and the diffusion barrier properties at the gate-dielectric interface. This stability of TaSixNy films may enable high-k dielectrics and metallic electrode to be implemented in advanced CMOS devices. An equivalent oxide thickness of 11.2Å was obtained in TaSixNy /HfO2/p-Si MOS capacitor, while maintaining low leakage current density of 4.1 x 10-2A/cm2 at Vg-VFB=-1V in accumulation. A less EOT increase(~3 Å) was observed with TaSixNy gates compared to other gates (Ta, TaNx, and Ru) due to the excellent oxygen barrier properties of TaSixNy gates, preventing oxygen diffusion into the dielectric through gate electrode and dielectric during annealing. It was observed that trapped charge was increased with nitrogen sputtering ambient and interface charge density was increased due to bombardment damage during gate metal sputtering. Further optimization to reduce oxide charges in the dielectric would be necessary for advanced metal gate/high-k technology.

Electrical characteristics of TaSixNy metal gate electrode on HfSiON/HfO2 gate dielectrics for N-MOSFET structure were also investigated. Capacitance-voltage results indicated that no evidence of gate-depletion with the introduction of TaSixNy metal gates. Reasonable output MOSFET characteristics such as Ids-Vgs, Ids-Vds, and Subthreshold swing, were obtained. However, degraded mobility characteristics were observed and were attributed to additional scattering mechanisms by trapped charges and interface charges in HfSiON/HfO2 dielectrics. A reduction in these charges is necessary to understand the intrinsic limitation of carrier mobility at Si-High-K dielectric interfaces.