3D-DATE: A Circuit-Level Three-Dimensional DRAM Area, Timing, and Energy Model.

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dc.contributor.advisorPaul Franzon, Co-Chair
dc.contributor.advisorWilliam Davis, Co-Chair
dc.contributor.advisorJames Tuck, Member
dc.contributor.advisorHans Hallen, Member
dc.contributor.authorPark, Jong Beom
dc.date.accepted2018-04-26
dc.date.accessioned2018-05-01T12:30:52Z
dc.date.available2018-05-01T12:30:52Z
dc.date.defense2018-04-20
dc.date.issued2018-04-20
dc.date.released2018-05-01
dc.date.reviewed2018-04-24
dc.date.submitted2018-04-23
dc.degree.disciplineElectrical Engineering
dc.degree.leveldissertation
dc.degree.nameDoctor of Philosophy
dc.descriptionNorth Carolina State University Theses Electrical and Computer Engineering.
dc.formatPh.D. North Carolina State University, 2018.
dc.identifier.otherdeg9028
dc.identifier.urihttp://www.lib.ncsu.edu/resolver/1840.20/35214
dc.rights
dc.title3D-DATE: A Circuit-Level Three-Dimensional DRAM Area, Timing, and Energy Model.
dcterms.extent1 online resource (x,157 pages) : illustrations

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