Top down design of the 8080 CPU in VHDL

Simple item page
dc.contributor.authorWang, Shengxin
dc.contributor.authorKanopoulos, Nick
dc.contributor.authorTrivedi, Kishor S.
dc.date.accessioned2007-01-04T20:10:43Z
dc.date.available2007-01-04T20:10:43Z
dc.date.issued1995
dc.format.extent270084 bytes
dc.format.extent1354932 bytes
dc.format.mimetypeapplication/pdf
dc.format.mimetypeapplication/pdf
dc.format.mimetypeapplication/postscript
dc.identifier.urihttp://www.ece.ncsu.edu/cacc/show_techreport.php?id=133
dc.identifier.urihttp://www.lib.ncsu.edu/resolver/1840.4/954
dc.language.isoen
dc.publisherNorth Carolina State University. Center for Advanced Computing and Communication
dc.relation.ispartofseriesTR-95/08
dc.relation.ispartofseriesCenter for Advanced Computing and Communication technical report
dc.titleTop down design of the 8080 CPU in VHDL
dc.typeTechnical report

Files

Original bundle

Now showing 1 - 2 of 2
No Thumbnail Available
Name:
TR_1995_08.pdf
Size:
263.75 KB
Format:
Adobe Portable Document Format
Download
No Thumbnail Available
Name:
TR_1995_08.ps
Size:
1.29 MB
Format:
Postscript Files
Download

Collections

Center for Advanced Computing and Communication