An Analytical Framework for PPA Estimation of Systolic Array-Based Hardware Accelerators.

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dc.contributor.advisorWilliam Davis, Chair
dc.contributor.advisorPaul Franzon, Member
dc.contributor.advisorTianfu Wu, Member
dc.contributor.advisorMengmeng Zhu, Member
dc.contributor.authorZhao, Qianli
dc.date.accepted2024-07-08
dc.date.accessioned2024-07-30T12:30:19Z
dc.date.available2024-07-30T12:30:19Z
dc.date.defense2024-06-18
dc.date.issued2024-06-18
dc.date.released2024-07-30
dc.date.reviewed2024-06-21
dc.date.submitted2024-06-18
dc.degree.disciplineComputer Engineering
dc.degree.leveldissertation
dc.degree.nameDoctor of Philosophy
dc.descriptionNorth Carolina State University Theses Electrical and Computer Engineering.
dc.formatPh.D. North Carolina State University, 2024.
dc.identifier.otherdeg38428
dc.identifier.urihttps://www.lib.ncsu.edu/resolver/1840.20/42091
dc.titleAn Analytical Framework for PPA Estimation of Systolic Array-Based Hardware Accelerators.
dcterms.extent1 online resource (viii, 98 pages) : illustrations (some color)

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