Methods for forming and integrated circuit structures containing enhanced-surface-area conductive layers

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dc.date.accessioned2008-10-13T21:26:22Z
dc.date.available2008-10-13T21:26:22Z
dc.date.issued2004
dc.format.extent155900 bytes
dc.format.mimetypeapplication/pdf
dc.identifier.citationBasceri, C., Visokay, M., Graettinger, T. M., & Cummings, S. D. (2004). Methods for forming and integrated circuit structures containing enhanced-surface-area conductive layers. U.S. Patent No. 6,812,112. Washington, DC: U.S. Patent and Trademark Office.
dc.identifier.urihttp://www.lib.ncsu.edu/resolver/1840.2/1316
dc.language.isoen
dc.titleMethods for forming and integrated circuit structures containing enhanced-surface-area conductive layers
dc.typePatent

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