Logical Process Size in Parallel Simulations

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dc.contributor.authorHao, Fang
dc.contributor.authorWilson, Karen
dc.contributor.authorFujimoto, Richard
dc.contributor.authorZegura, Ellen
dc.date.accessioned2012-01-12T18:46:02Z
dc.date.available2012-01-12T18:46:02Z
dc.date.issued1996
dc.format.extent1278991 bytes
dc.format.mimetypeapplication/pdf
dc.format.mimetypeapplication/pdf
dc.identifier.urihttp://www.lib.ncsu.edu/resolver/1840.4/5169
dc.language.isoen
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)
dc.relation.ispartofseriesWinter Simulation Conference Proceedings
dc.titleLogical Process Size in Parallel Simulations
dc.typeTechnical report

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