Design and Verification of a DDR2 Memory Controller for System on Chip Education.

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dc.contributor.advisorWilliam Davis, Chairen_US
dc.contributor.advisorPaul Franzon, Memberen_US
dc.contributor.advisorHuiyang Zhou, Memberen_US
dc.contributor.authorMohan, Aparnaen_US
dc.date.accepted2014-06-06en_US
dc.date.accessioned2014-06-21T09:30:13Z
dc.date.available2014-06-21T09:30:13Z
dc.date.defense2014-05-08en_US
dc.date.issued2014-05-08en_US
dc.date.released2014-06-21en_US
dc.date.reviewed2014-05-19en_US
dc.date.submitted2014-05-09en_US
dc.degree.disciplineComputer Engineeringen_US
dc.degree.levelthesisen_US
dc.degree.nameMaster of Scienceen_US
dc.identifier.otherdeg3505en_US
dc.identifier.urihttp://www.lib.ncsu.edu/resolver/1840.16/9511
dc.rightsen_US
dc.titleDesign and Verification of a DDR2 Memory Controller for System on Chip Education.en_US

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