Adaptive Clock Design for Memory Intensive 3D Integrated Circuits.

dc.contributor.advisorWilliam Davis, Chairen_US
dc.contributor.advisorGriff Bilbro, Memberen_US
dc.contributor.advisorPaul Franzon, Memberen_US
dc.contributor.advisorDouglas Reeves, Memberen_US
dc.contributor.advisorLei Luo, Technical Consultanten_US
dc.contributor.authorChen, Xien_US
dc.date.accepted2011-12-08en_US
dc.date.accessioned2012-12-12T06:32:10Z
dc.date.available2012-12-12T06:32:10Z
dc.date.defense2011-11-30en_US
dc.date.embargo2012-12-12en_US
dc.date.issued2011-11-30en_US
dc.date.released2012-12-12en_US
dc.date.reviewed2011-12-02en_US
dc.date.submitted2011-12-01en_US
dc.degree.disciplineElectrical Engineeringen_US
dc.degree.leveldissertationen_US
dc.degree.nameDoctor of Philosophyen_US
dc.descriptionNorth Carolina State University Theses Electrical and Computer Engineering.
dc.formatPh.D. North Carolina State University, 2012.
dc.identifier.otherdeg1330en_US
dc.identifier.urihttp://www.lib.ncsu.edu/resolver/1840.16/8273
dc.rightsen_US
dc.titleAdaptive Clock Design for Memory Intensive 3D Integrated Circuits.en_US
dcterms.extent1 online resource (ix, 105 pages) : illustrations

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