Design of a Scalable, Configurable, and Cluster-based Hierarchical Hardware Accelerator for a Cortically Inspired Algorithm and Recurrent Neural Networks.

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dc.contributor.advisorPaul Franzon, Chair
dc.contributor.advisorWinser Alexander, Member
dc.contributor.advisorEric Laber, Graduate School Representative
dc.contributor.advisorDror Baron, Member
dc.contributor.advisorEric Laber, Member
dc.contributor.authorDey, Sumon
dc.date.accepted2019-09-12
dc.date.accessioned2019-09-23T12:30:49Z
dc.date.available2019-09-23T12:30:49Z
dc.date.defense2018-11-13
dc.date.issued2018-11-13
dc.date.released2019-09-23
dc.date.reviewed2019-08-21
dc.date.submitted2019-08-20
dc.degree.disciplineComputer Engineering
dc.degree.leveldissertation
dc.degree.nameDoctor of Philosophy
dc.identifier.otherdeg18629
dc.identifier.urihttp://www.lib.ncsu.edu/resolver/1840.20/36944
dc.rights
dc.titleDesign of a Scalable, Configurable, and Cluster-based Hierarchical Hardware Accelerator for a Cortically Inspired Algorithm and Recurrent Neural Networks.

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