Integrated circuits having cooperative ring oscillator clock circuits therein to minimize clock skew
| dc.date.accessioned | 2008-07-21T21:17:50Z | |
| dc.date.available | 2008-07-21T21:17:50Z | |
| dc.date.issued | 2000 | |
| dc.format.extent | 81903 bytes | |
| dc.format.mimetype | application/pdf | |
| dc.identifier.citation | Hall, L. C., Clements, S. M., Liu, W.-T., & Bilbro, G. L. (2000). Integrated circuits having cooperative ring oscillator clock circuits therein to minimize clock skew. U.S. Patent No. 6,104,253. Washington, DC: U.S. Patent and Trademark Office. | |
| dc.identifier.uri | http://www.lib.ncsu.edu/resolver/1840.2/855 | |
| dc.language.iso | en | |
| dc.title | Integrated circuits having cooperative ring oscillator clock circuits therein to minimize clock skew | |
| dc.type | Patent |
